Odroid-7 CPU보드 회로에 관련하여..

ohangel at 09h30
22
Feb
2011
Odroid-7 CPU보드 회로에 관련하여..

CPU보드 회로 설계하던중 궁금한게 있어 질문드립니다.
PMIC 쪽에서 PLL관련 전압을 독립 LDO를 따로 쓰셨더라구요. PMIC에 1.2V 전압 출력도 많은데 왜 따로 쓰셨는지..? 혹 정확하게 1.1V를 써야 해서 그런지, 아님 PLL이라 노이즈 관련 문제때문인지...

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22/02/2011 at 09h30 by "ohangel"